1. Field of the Invention
The present invention relates to an amplifier circuit which operates at a low current.
2. Description of the Related Art
An LO (Local Oscillator) buffer amplifier is one of amplifier circuits for local oscillator peripheral circuits used in a frequency converter in a receiving section of a cellular phone. In recent years, since low power consumption is highly required in cellular phones, the LO buffer amplifier need operate at a low current of approximately 1 to 2 mA.
FIG. 1 is an equivalent circuit diagram of an amplifier circuit of a first prior art with a pseudo enhancement mode HJ (Hetero Junction)-FET. The pseudo enhancement mode HJ-FET refers to a hetero-junction field-effect transistor with a threshold voltage Vth of approximately xe2x88x920.1 V.
The amplifier circuit of the first prior art comprises input/output circuit 15 for amplifying an input signal at a radio frequency and providing an output signal, power supply circuit 25 for supplying input/output circuit 15 with power, active bias circuit 35 for supplying input/output circuit 15 with a bias voltage, and capacitor 154 for removing direct-current components in the output signal. Input/output circuit 15 and active bias circuit 35 are arranged within an IC such as an MMIC (Monolithic Microwave Integrated Circuit) with a pseudo enhancement mode HJ-FET, and power supply circuit 25 and capacitor 154 are provided outside the IC.
Input/output circuit 15 includes capacitor 151 for removing direct-current components in the input signal, resistor 152 for providing a load to the bias voltage supplied from active bias circuit 35, and field-effect transistor 153 for amplifying the input signal. Capacitor 151 is connected between an input terminal and a gate of field-effect transistor 153. Resistor 152 is connected between an input from active bias circuit 35 and the gate of field-effect transistor 153. A source of field-effect transistor 153 is grounded. Field-effect transistor 153 has a gate width of 200 xcexcm, and if the bias voltage is, for example 0.2 V, a current of approximately 6 mA flows.
A drain of field-effect transistor 153 is connected to one terminal of capacitor 154, and the other terminal of capacitor 154 serves as the output from the amplifier circuit.
Power supply circuit 25 includes voltage source 251 for supplying a direct-current voltage, capacitor 252 for removing noise in the power supply, and load inductor 253 for providing a load to output from voltage source 251. Capacitor 252 is connected between an output of voltage source 251 and a ground potential. Load inductor 253 has one terminal connected to the output of voltage source 251 and the other terminal connected to the drain of transistor 153.
Active bias circuit 35 includes field-effect transistor 351 for controlling the bias voltage supplied to input/output circuit 15, and resistors 352, 353, and 354. Resistor 352 has one terminal connected to the drain of field-effect transistor 153 and the other terminal which is connected to a drain of field-effect transistor 351 and to one terminal of resistor 353 and supplies the bias voltage to input/output circuit 15. The other terminal of resistor 353 is connected to a gate of field-effect transistor 351 and to one terminal of resistor 354. A source of field-effect transistor 351 and the other terminal of resistor 354 are grounded.
In the amplifier circuit of the first prior art, input/output circuit 15 supplied the power from power supply circuit 25 biases an input signal with the bias voltage provided by active bias circuit 35, and amplifies and provides the signal.
FIG. 2 is an equivalent circuit diagram showing an amplifier circuit of a second prior art.
The amplifier circuit of the second prior art has field-effect transistor 161 with a gate width of 50 xcexcm instead of field-effect transistor 153 in the first prior art, and the remaining configuration is the same as that of the first prior art.
Since the gate width is as thin as 50 xcexcm in the second prior art, it is possible to suppress a current to approximately 0.2 mA even when a bias voltage of 0.2 V is applied.
FIG. 3 is an equivalent circuit diagram showing an amplifier circuit of a third prior art.
In the amplifier circuit of the third prior art, load inductor 253 in power supply circuit 25 of the second prior art is eliminated, and load inductor 171 is included as an IC internal circuit between the connection of constant-voltage source 251 and capacitor 154 and the connection of field-effect transistor 161 and resistor 352. The remaining configuration is the same as that of the amplifier circuit of the second prior art.
In the amplifier circuit of the third prior art, since load inductor 171 reduces static electricity from the outside applied between the drain and the source, a current is suppressed to approximately 2 mA, and breakdown due to static electricity is also unlikely to occur.
FIG. 4 is an equivalent circuit diagram showing an amplifier circuit of a fourth prior art.
The amplifier circuit of the fourth prior art is of a self-bias type, and includes resistor 181 and bypass capacitor 182 in parallel between a source of field-effect transistor 153 and a ground potential in the configuration of the amplifier circuit of the first prior art. The remaining configuration is the same as that of the amplifier circuit of the first prior art.
Since the amplifier circuit of the fourth prior art is of the self-bias type and cancels a bias voltage at a gate of the transistor with a bias voltage at the source, it can operates at a low current.
The amplifier circuits shown as the first to fourth prior arts suffer from the following problems.
Theoretically, the amplifier circuit of the first prior art can be operated at a low current with a bias voltage of 0 V, but actually, the bias voltage cannot be set at 0V to compensate for variations in the threshold voltage Vth of fired-effect transistor 153. Specifically, in the amplifier circuit of the first prior art, the threshold voltage Vth of the pseudo enhancement mode HJ-FET has variations ranging from xe2x88x920.2 V to 0 V as shown in FIG. 5, and the bias voltage need be set at 0.2 V or higher to compensate for the variations. Since a bias voltage of 0.2 V causes a current of approximately 6 mA to pass through field-effect transistor 153, it is impossible to realize a low current of 1 to 2 mA required for an amplifier circuit in a cellular phone.
The amplifier circuit of the second prior art has its gate as thin as of 50 xcexcm and can operate at a low current, but breakdown readily occurs due to static electricity between the drain and the source.
While the amplifier circuit of the third prior art can operate at a low current and the static breakdown is unlikely to occur, the IC chip size is large since load inductor 171 which is a spiral inductor occupies a large area within the MMIC. In addition, the load inductor disposed outside the IC in the other prior arts is included within the IC, thereby reducing the choice of inductance value.
In the fourth prior art, the capacitance of bypass capacitor 182 cannot be reduced sufficiently since the impedance is large. Thus, at a high frequency, a short circuit is insufficient and negative resistance tends to be arisen, resulting in unstable operations of field-effect transistor 153. Also, a highly dielectric film is required for forming bypass capacitor 182, and complicated manufacturing steps and higher cost are involved.
It is an object of the present invention to provide a low current amplifier circuit which stably operates at a low current and has a reduced tendency to cause static breakdown.
The low current amplifier circuit according to the present invention comprises a power supply circuit, a bias circuit, and first and second field-effect transistors.
The power supply circuit-provides power supply voltage. The bias circuit biases an input signal. The first field-effect transistor has a small gate width to pass a small current when a bias voltage is applied to its gate to compensate for variations in threshold voltage. The first field-effect transistor has its grounded source and its gate to which an input signal biased with the bias voltage is applied. The second field-effect transistor has a larger gate width than that of the first field-effect transistor, its source connected to a drain of the first field-effect transistor, and its drain supplied with the power supply voltage.
In the low current amplifier circuit of the present invention, a current from static electricity flows through the second field-effect transistor connected in a cascade to the first field-effect transistor, and a current flowing between the drain and the source of the first field-effect transistor is reduced. Thus, the first field-effect transistor having a small gate width for realizing a low current can be protected against the static electricity by the second field-effect transistor having a larger gate width.
The gate of the first field-effect transistor has a width for allowing the transistor to operate at a current of 2 mA or lower when the bias voltage is applied to the gate, and preferably, the width is 50 xcexcm or less.
The gate of the second field-effect transistor has a width for not readily causing static breakdown of the transistor even when a voltage from static electricity is applied between the drain and the source, and preferably, the width is 200 xcexcm or more.